Consecutive repetition

Syntax at a glance

a[*3]

How it works

Consecutive repetition is a future concept in this application. The illustrative a[*3] describes a sequence of three consecutive samples where a is true. Think of it as a duration requirement rather than a single check several cycles in the future. It is not accepted by the current parser.

For a Boolean condition repeated three times starting at t, the intended checks are at t, t+1, and t+2. A high at the first and last samples with a low between them would not satisfy that consecutive run. Extra high samples outside the matched run are not automatically forbidden.

A fixed delay such as ##2 a only checks the endpoint two samples later; it says nothing about the intervening value. When exploring this distinction in the present lab, simple fixed runs can be written using supported chained conditions, such as req |-> a ##1 a ##1 a.

This guide introduces the idea, not the full SystemVerilog repetition grammar. Repetition ranges, empty matches, and interactions with other sequence constructs need their own semantics and tests before this feature can be enabled. Use the supported delay and Boolean guides for current exercises.